1. Field of the Invention
This invention relates to a semiconductor memory device, specifically to a mask ROM formed on an insulating substrate such as glass.
2. Description of the Related Art
Mask ROM is a kind of semiconductor memory devices and a read-only memory for writing program during transistor manufacturing process. A plurality of memory elements is placed. Some memory elements are the transistors which become conductive when a gate voltage VG is applied. Other memory elements do not become conductive when the gate voltage VG is applied. A program is written into the memory element by using these different features of the elements. FIGS. 11A and 11B are the cross-sectional view of a typical memory element for the mask ROM. FIG. 11A shows a memory element 100 with “1” written on it, and FIG. 11B shows a memory element 101 with “0” written on it.
A gate insulating film 103, on which a gate electrode 104 is formed, is disposed on a semiconductor substrate 102. In the semiconductor substrate corresponding to both ends of the gate electrode 104, impurities, such as arsenic, boron, and phosphorus, are implanted, forming an impurity region 105. This configuration described above can be commonly used whether program is to be written or not. In the memory element, to which the information “0” is to be written, high concentration impurities with an opposite conductivity type from the impurity region 105 are implanted to a channel, forming a channel dope region 106. The following description assumes that phosphorus ions, an n-type impurity, are implanted into the impurity region 105.
The memory element 100 with “1” written on it is a transistor. When the gate voltage VG is applied to the gate electrode 104 by an address decoder, a channel is formed in the semiconductor substrate 102 directly underneath the gate electrode 104 and the memory element becomes conductive. When a read-out voltage VR is applied to one impurity region 105a, an output voltage Vout is outputted from the other impurity region 105b. On the other hand, in the memory element 101 with “0” written on it, the channel dope region 106 is formed, making the threshold value very high. It does not become conductive when the gate voltage VG is applied. Therefore, the voltage of the impurity region 105d does not change when the read-out voltage VR is applied to the other impurity region 105c. 
Next, the manufacturing method of the mask ROM will be explained. The semiconductor substrate 100 is heated at 1000° C. or higher in oxygen atmosphere. The surface of the semiconductor substrate 100 is oxidized by about 10 nm by thermal oxidation, forming the gate oxidation film 103. Then, a metal film is formed on the gate oxidation film 103 by sputtering of a metal such as chrome and a predetermined area is removed by etching, forming the gate electrode 104. Next, the impurity regions 105a, 105b are formed by implanting phosphorus ion with the gate electrode 104 used as a mask. The process described above can be used regardless of the program to be written in. Then, a mask is formed on the memory element 100, to which bit data is not to be written. Also, in the memory element 101, in which bit data is to be written, a well 106 is formed by implanting boron ions into the semiconductor substrate 102 through the gate electrode 104 and the gate oxidation film 103. Accordingly, a program is written in the memory device.
In the manufacturing processes of the mask ROM, the process for program writing should be scheduled closer to the end of the processes as much as possible. The most preferable way to write the program into the mask ROM is to perform the program writing according to usage of semiconductor chips. Therefore, the semiconductor device, on which all the manufacturing processes other than program writing are done, should be stored till the usage of the device is determined. Then, when the usage of the device is determined, the program writing is performed to the stored device. In this way, the TAT (Turn Around Time), from the preparation of the program to the completion of the mask ROM, can be minimized.
There has been a demand for the mask ROM formed together with a TFT array on a glass substrate for a use in a liquid crystal display device, an image-reading device using TFT and a finger print-reading device using TFT. However, it is difficult to form the memory element on the glass substrate by the manufacturing method of the mask ROM described above, because the softening point of the glass used as a substrate is about 700° C. Therefore, it is impossible to form the gate insulating film 103 through thermal oxidation. The gate insulating film needs to be formed through chemical vapor deposition (CVD) method. However, since the insulating film formed by CVD method has a relatively coarse particle density and a low insulating capability in comparison to the thermally oxidized film, the thickness of the film needs to be about 100-400 nm. The thickness of the gate electrode is about 350 nm. But the polycrystalline silicon film is very thin, with the thickness of about 40-50 nm. Therefore, it is difficult to perform the ion implantation into the thin silicon film through the thick gate electrode and the gate insulating film.